makefile interview questions
Top makefile frequently asked interview questions
These 2 files are mostly seen in Open Source projects.
What are they for, and how do they work?
Source: (StackOverflow)
How to pass variables to gnu makefile from command line arguments? In other words I want to pass some arguments which will eventually become variables in makefile.
Source: (StackOverflow)
I want to execute these commands
./a.out 1
./a.out 2
./a.out 3
./a.out 4
.
.
. and so on
How to write this thing as a loop in a make file?
Source: (StackOverflow)
Just upgraded my computer to Mac OS X Lion and went to terminal and typed "make" but it says:
-bash: make: command not found
Where did the "make" command go?
Source: (StackOverflow)
I am getting the following error running make
:
Makefile:168: *** missing separator. Stop.
What is causing this?
Source: (StackOverflow)
I need to generate a directory in my makefile and I would like to not get the "directory already exists error" over and over even though I can easily ignore it.
I mainly use mingw/msys but would like something that works across other shells/systems too.
I tried this but it didn't work, any ideas?
ifeq (,$(findstring $(OBJDIR),$(wildcard $(OBJDIR) )))
-mkdir $(OBJDIR)
endif
Source: (StackOverflow)
How hard would it be to use GCC instead of VC++ from within Visual Studio 2008? Obviously, some of the keywords won't match, and some may not get syntax highlighting (unless you made a new language service).
Is this what a 'makefile project' is for, pretty much?
Source: (StackOverflow)
target: dependencies
command1
command2
On my system (Mac OS X), make
seems to require that that Makefiles have a tab character preceding the the content of each command
line, or it throws a syntax error.
This is an annoyance when creating or editing Makefiles because I have my editor set up to be all-spaces-all-the-time.
Can you make valid Makefiles without tab characters?
Source: (StackOverflow)
Can anybody give a clear explanation of how variable assignment really works in Makefiles.
What is the difference between :
VARIABLE = value
VARIABLE ?= value
VARIABLE := value
VARIABLE += value
I have read the section in GNU Make's manual, but it still doesn't make sense to me.
Source: (StackOverflow)
What does .PHONY
mean in a Makefile? I have gone through this, but it is too complicated.
Can somebody explain it to me in simple terms?
Source: (StackOverflow)
for example I have something like this in my makefile
all:
cd some_directory
but when I type make I saw only 'cd some_directory' like in echo command
Source: (StackOverflow)
We are required to use a Makefile to pull everything together for our project but our professor never showed us how to.
I only have ONE file, a3driver.cpp
.
The driver imports a class from a location "/user/cse232/Examples/example32.sequence.cpp"
.
That's it, everything else is contained with the .cpp
.
How would I go about making a simple Makefile that creates an executable called a3a.exe
?
Source: (StackOverflow)