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How can I use bash syntax in Makefile targets?

I often find bash syntax very helpful, e.g. process substitution like in diff <(sort file1) <(sort file2).

Is it possible to use such bash commands in a Makefile? I'm thinking of something like this:

file-differences:
    diff <(sort file1) <(sort file2) > $@

In my GNU Make 3.80 this will give an error since it uses the shell instead of bash to execute the commands.

Make error: missing separator

I am getting the following error running make:

Makefile:168: *** missing separator.  Stop.

What is causing this?

Difference between CPPFLAGS and CXXFLAGS in GNU Make

What's the difference between CPPFLAGS and CXXFLAGS in GNU Make?

How to assign the output of a command to a Makefile variable

I need to execute some make rules conditionally, only if the Python installed is greater than a certain version (say 2.5).

I thought I could do something like executing:

python -c 'import sys; print int(sys.version_info >= (2,5))'

and then using the output ('1' if ok, '0' otherwise) in a ifeq make statement.

In a simple bash shell script it's just:

MY_VAR=`python -c 'import sys; print int(sys.version_info >= (2,5))'`

but that doesn't work in a Makefile.

Any suggestions? I could use any other sensible workaround to achieve this.

What is the purpose of .PHONY in a makefile?

What does .PHONY mean in a Makefile? I have gone through this, but it is too complicated.

Can somebody explain it to me in simple terms?

Where can I find "make" program for Mac OS X Lion?

Just upgraded my computer to Mac OS X Lion and went to terminal and typed "make" but it says: -bash: make: command not found

Where did the "make" command go?

What's the opposite of 'make install', ie. how do you uninstall a library in Linux?

While running

./configure --prefix=/mingw

on a MinGW/MSYS system for a library I had previously run

'./configure --prefix=/mingw && make && make install'

I came across this message:

WARNING: A version of the Vamp plugin SDK is already installed. Expect worries and sorrows if you install a new version without removing the old one first. (Continuing)

This had me worried. What's the opposite of 'make install', ie. how is a library uninstalled in Linux? Will 'make clean' do the job, or are there other steps involved?

Why is no one using make for Java?

Just about every Java project that I've seen either uses Maven or Ant. They are fine tools and I think just about any project can use them. But what ever happened to make? It's used for a variety of non-Java projects and can easily handle Java. Sure you have to download make.exe if you use Windows, but Ant and Maven also don't come with the JDK.

Is there some fundamental flaw with make when used with Java? Is it just because Ant and Maven are written in Java?

CFLAGS vs CPPFLAGS

I understand that CFLAGS (or CXXFLAGS for C++) are for the compiler, whereas CPPFLAGS is used by the preprocessor.

But I still don't understand the difference.

I need to specify an include path for a header file that is included with #include -- because #include is a preprocessor directive, is the preprocessor (CPPFLAGS) the only thing I care about?

Under what circumstances do I need to give the compiler an extra include path?

In general, if the preprocessor finds and includes needed header files, why does it ever need to be told about extra include directories? What use is CFLAGS at all?

(In my case, I actually found that BOTH of these allow me to compile my program, which adds to the confusion... I can use CFLAGS OR CPPFLAGS to accomplish my goal (in autoconf context at least). What gives?)

How to get current directory of your makefile?

I have a several Makefiles in app specific directories like this:

/project1/apps/app_typeA/Makefile
/project1/apps/app_typeB/Makefile
/project1/apps/app_typeC/Makefile

Each Makefile includes a .inc file in this path one level up:

/project1/apps/app_rules.inc

Inside app_rules.inc I'm setting the destination of where I want the binaries to be placed when built. I want all binaries to be in their respective app_type path:

/project1/bin/app_typeA/

I tried using $(CURDIR), like this:

OUTPUT_PATH = /project1/bin/$(CURDIR)

but instead I got the binaries buried in the entire path name like this: (notice the redundancy)

/project1/bin/projects/users/bob/project1/apps/app_typeA

What can I do to get the "current directory" of execution so that I can know just the app_typeX in order to put the binaries in their respective types folder?

Can you make valid Makefiles without tab characters?

target: dependencies
    command1
    command2

On my system (Mac OS X), make seems to require that that Makefiles have a tab character preceding the the content of each command line, or it throws a syntax error.

This is an annoyance when creating or editing Makefiles because I have my editor set up to be all-spaces-all-the-time.

Can you make valid Makefiles without tab characters?

Using make on OSX

I have a macbook I'm trying to do some development on. I have a program I want to build, and when I went to use make to build it I got a "command not found" error. I did some google and SO searches and it doesn't look like this is a common problem. Why don't I have make installed and how do I get it? I'm extra confused because I know I used it relatively recently (in the past month or so) when I was on this laptop.

How "make" app knows default target to build if no target is specified?

Most linux apps are compiled with

make
make install clean

As i understood, make takes names of build targets as arguments. so "install" is a target that copies some files and after that "clean" is a target that removes temporary files.

But what target "make" will build if no arguments are specified (first command in my example)?

How to have GNU make explicitly test for failure?

After years of not using make, I find myself needing it again, the gnu version now. I'm pretty sure I should be able to do what I want, but haven't figured out how, or found an answer with Google, etc.

I'm trying to create a test target which will execute my program a number of times, saving the results in a log file. Some tests should cause my program to abort. Unfortunately, my makefile aborts on the first test which leads to an error. I have something like:

# Makefile
# 
test:
        myProg -h > test.log              # Display help
        myProg good_input >> test.log     # should run fine
        myProg bad_input1 >> test.log      # Error 1
        myProg bad_input2 >> test.log      # Error 2

With the above, make quits after the bad_input1 run, never getting to the bad_input2 run.

What is the difference between gmake and make?

I am trying to understand the difference between 'gmake' and 'make'?

On my linux box they are identical:

% gmake --version
GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

% make --version
GNU Make 3.81
Copyright (C) 2006  Free Software Foundation, Inc.
This is free software; see the source for copying conditions.
There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A
PARTICULAR PURPOSE.

I am guessing this isn't the same on all platforms? Is there a good reason to use one over the other?
Is there some historical significance to why there are the two names?